
Scott Irving : Curriculum Vitae
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Publications
Irving, Scott. “Process and Device Simulation for Semiconductor Manufacturing.” Samoset Resort, Camden, Me, 1988.
Desbiens, D., and S. Irving. “Modeling of Polysilicon Films Using SUPREM III,” 1986.
Guvench, M.G., S. Irving, M. Robinson, and D. Desbiens. “Concurrent Use of Two-Dimensional Process and Device Simulators in the Development of a Latch-up Free BiCMOS Process.” In University/Government/Industry Microelectronics Symposium, 1991. Proceedings., Ninth Biennial, 159–63, 1991. doi:10.1109/UGIM.1991.148142.
Irving, S. J., and R.A. Levy. “Triggering Mechanisms for Photoresists,” 1978.
Irving, S., and Yong Liu. “Free Drop Test Simulation for Portable IC Package by Implicit Transient Dynamics FEM.” In Electronic Components and Technology Conference, 2004. Proceedings. 54th, 1:1062–66 Vol.1, 2004. doi:10.1109/ECTC.2004.1319471.
Irving, S., Yong Liu, E.I.V. Almagro, and H.T. Granada. “An Effective Method for Improving IC Package Die Failure during Assembly Punch Processing.” In Proceedings of the 6th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2005. EuroSimE 2005, 227–33, 2005. doi:10.1109/ESIME.2005.1502806.
Irving, S., Yong Liu, D. Connerny, and T. Luk. “SOI Die Heat Transfer Analysis from Device to Assembly Package.” In 7th International Conference on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2006. EuroSime 2006, 1–6, 2006. doi:10.1109/ESIME.2006.1643947.
Irving, S., and Youg Liu. “Wafer Deposition/metallization and Back Grind, Process-Induced Warpage Simulation.” In Electronic Components and Technology Conference, 2003. Proceedings. 53rd, 1459–62, 2003. doi:10.1109/ECTC.2003.1216487.
Irving, S., and R. Trahan. “Sequential Plasma Etching of a Multilayer Metallization.” In ECS Extended Abstracts, 84:–2:597. New Orleans, LA: ECS, 1984.
Irving, Scott. “Electrical Calculations In Suprem4.” National Semiconductor, Santa Clara, CA, 1993.
Irving, Scott. “Industrial Use of Device Simulation.” Stanford University, 1993.
Lihua, Liang, Chen Xuefan, Wang Qiang, Liu Fei, Yong Liu, S. Irving, and Timwah Luk. “Characterization of Dynamic Behavior of Pb-Free Material 95.7Sn3.8Ag0.5Cu and Its Determination of Dynamic Constitutive Model Parameters.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008, 1–5, 2008. doi:10.1109/ESIME.2008.4525027.
Liu, Y., Y. Liu, S. Irving, and T. Luk. “Wafer Probing Simulation for Copper Bond Pad Based BPOA Structure.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007, 1–5, 2007. doi:10.1109/ESIME.2007.360035.
Liu, Yong, H. Allen, Timwah Luk, and S. Irving. “Simulation and Experimental Analysis for a Ball Stitch on Bump Wire Bonding Process above a Laminate Substrate.” In Electronic Components and Technology Conference, 2006. Proceedings. 56th, 6 pp. – , 2006. doi:10.1109/ECTC.2006.1645923.
Liu, Yong, D. Desbiens, S. Irving, T. Luk, S. Edborg, D. Hahn, and S. Park. “Probe Test Failure Analysis of Bond Pad over Active Structure by Modeling and Experiment.” In Electronic Components and Technology Conference, 2005. Proceedings. 55th, 861–66 Vol. 1, 2005. doi:10.1109/ECTC.2005.1441373.
Liu, Yong, D. Desbiens, S. Irving, Timwah Luk, C. Lolar, Yumin Liu, and Qiuxiao Qian. “Systematic Evaluation of Die Thinning Application in a Power SIPs by Simulation.” In Electronic Components and Technology Conference, 2006. Proceedings. 56th, 9 pp. – , 2006. doi:10.1109/ECTC.2006.1645773.
Liu, Yong, D. Desbiens, T. Luk, and S. Irving. “Parameter Optimization for Wafer Probe Using Simulation.” In Proceedings of the 6th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2005. EuroSimE 2005, 156–61, 2005. doi:10.1109/ESIME.2005.1502792.
Liu, Yong, and S. Irving. “Power Cycling Simulation of an IC Package: Considering Electromigration and Thermal-Mechanical Failure.” In Electronic Components and Technology Conference, 2003. Proceedings. 53rd, 415–21, 2003. doi:10.1109/ECTC.2003.1216311.
Liu, Yong, S. Irving, D. Desbiens, T. Luk, N. S. How, YongSuk Kwon, and SangDo Lee. “Impact of the Die Attach Process on Power Thermal Cycling for a Discrete Style Semiconductor Package.” In Proceedings of the 6th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2005. EuroSimE 2005, 221–26, 2005. doi:10.1109/ESIME.2005.1502805.
Liu, Yong, S. Irving, and T. Luk. “Thermosonic Wire Bonding Process Simulation and Bond Pad over Active Stress Analysis.” In Electronic Components and Technology Conference, 2004. Proceedings. 54th, 1:383–91 Vol.1, 2004. doi:10.1109/ECTC.2004.1319369.
Liu, Yong, S. Irving, T. Luk, and D. Kinzer. “Trends of Power Electronic Packaging and Modeling.” In Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th, 1–11, 2008. doi:10.1109/EPTC.2008.4763404.
Liu, Yong, S. Irving, T. Luk, Lihua Liang, and Shinan Wang. “3D Modeling of Electromigration Combined with Thermal-Mechanical Effect for IC Device and Package.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007, 1–13. IEEE, 2007. doi:10.1109/ESIME.2007.360067.
Liu, Yong, S. Irving, T. Luk, M. Rioux, and Qiuxiao Qian. “Impact of Wedge Wire Bonding and Thermal Mechanical Stress on Reliability of BPSG/poly Layer of a Silicon Die.” In Electronic Components and Technology Conference, 2008. ECTC 2008. 58th, 1714–18, 2008. doi:10.1109/ECTC.2008.4550211.
Liu, Yong, S. Irving, and M. Rioux. “Delamination Modeling for IC Package with Multiple Initial Cracks.” In Electronic Components and Technology Conference, 2003. Proceedings. 53rd, 1772–76, 2003. doi:10.1109/ECTC.2003.1216542.
Liu, Yong, S. Irving, M. Rioux, A.J. Schoenberg, and D. Chong. “Die Attach Delamination Characterization Modeling for SOIC Package.” In Electronic Components and Technology Conference, 2002. Proceedings. 52nd, 839–46, 2002. doi:10.1109/ECTC.2002.1008198.
Liu, Yong, S. Irving, M. Tumulak, and E.A. Cabahug. “Assembly Process Induced Stress Analysis for New FLMP Package by 3D FEA.” In Electronic Components and Technology Conference, 2002. Proceedings. 52nd, 604–10, 2002. doi:10.1109/ECTC.2002.1008157.
Liu, Yong, T. Luk, and S. Irving. “Parameter Modeling for Wafer Probe Test.” IEEE Transactions on Electronics Packaging Manufacturing 32, no. 2 (2009): 81–88. doi:10.1109/TEPM.2009.2017514.
Liu, Yong, R. Qian, C. Quinones, S. Irving, and T. Luk. “Impact of Manufacturing Variation on the Reliability/quality of an Opto-BGA System in Package.” In Electronic Components and Technology Conference, 2009. ECTC 2009. 59th, 196–200, 2009. doi:10.1109/ECTC.2009.5074016.
Liu, Yong, Qiang Wang, Lihua Liang, Xuefan Chen, S. Irving, and T. Luk. “A New Prediction Methodology for Electromigration-Induced Solder Degradation in a WL-CSP System.” In Electronic Components and Technology Conference, 2009. ECTC 2009. 59th, 269–76, 2009. doi:10.1109/ECTC.2009.5074027.
Liu, Yong., S. Irving, and T. Luk. “Thermosonic Wire Bonding Process Simulation and Bond Pad Over Active Stress Analysis.” IEEE Transactions on Electronics Packaging Manufacturing 31, no. 1 (2008): 61–71. doi:10.1109/TEPM.2007.914232.
Liu, Yumin, M. Carredo, Zhiping Hu, Yong Liu, T. Luk, and S. Irving. “Effect of Wire Bond and Die Layout on Electrical Performance of Power Packages.” In 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, 2009. EuroSimE 2009, 1–6, 2009. doi:10.1109/ESIME.2009.4938434.
Liu, Yumin, Yong Liu, and S. Irving. “Board Level Drop Test Simulation for an Advanced MLP.” In 8th International Conference on Electronic Packaging Technology, 2007. ICEPT 2007, 1–5, 2007. doi:10.1109/ICEPT.2007.4441514.
Liu, Yumin, Yong Liu, S. Irving, and T. Luk. “Thermal Stress Simulation in the Metal-Insulator-Metal (MIM) Wafer Fabrication Process.” In Electronic Components and Technology Conference, 2008. ECTC 2008. 58th, 1067–72, 2008. doi:10.1109/ECTC.2008.4550107.
Liu, Yumin, Yong Liu, S. Irving, A. Zhu, and Xingquan Fang. “Optimization of 2 Mil Al Wire Wedge Bond of D-PAK.” In 7th International Conference on Electronic Packaging Technology, 2006. ICEPT ’06, 1–5, 2006. doi:10.1109/ICEPT.2006.359767.
Liu, Yumin, Yong Liu, J. Yang, Qiuxiao Qian, and S. Irving. “Reliability Study of Ceramic Substrate in a SIP Type Package.” In 2005 6th International Conference on Electronic Packaging Technology, 84–87, 2005. doi:10.1109/ICEPT.2005.1564693.
Pflug, J., and S. Irving. “FAST LSI’s Plasma Etched Dual Layer Metal Process,” 1984.
Qian, Qiuxiao, Yong Liu, S. Irving, Hua Yang, and Yang Zhang. “Simulation and Analysis for Lead Frame Bending Impact to Assembly Singulation Process.” In 7th International Conference on Electronic Packaging Technology, 2006. ICEPT ’06, 1–6, 2006. doi:10.1109/ICEPT.2006.359766.
Qian, Qiuxiao, Yong Liu, Yumin Liu, Hua Yang, and S. Irving. “TO220 Package Lead Frame Optimization for Reducing Trim and Form Delamination by Simulation.” In 2005 6th International Conference on Electronic Packaging Technology, 157–60, 2005. doi:10.1109/ICEPT.2005.1564692.
Qian, Qiuxiao, Yong Liu, T. Luk, and S. Irving. “Wire Bonding Capillary Profile and Bonding Process Parameter Optimization Simulation.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008, 1–7, 2008. doi:10.1109/ESIME.2008.4525066.
Qian, R., Yong Liu, S. Irving, and T. Luk. “Impact of Solder Overflow and ACLV Moisture Absorption of Mold Compound on Package Reliability.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007, 1–5, 2007. doi:10.1109/ESIME.2007.359956.
Sun, Jiyong, Thierry Hernoult, Scott Irving, Tiger Wu, Wind Hu, and Walter Zhu. “Application of Optical Simulation in Optocoupler and Optoelectronic Sensor Development.” Shanghai, 2009.
Wang, Qiang, Yuanxiang Zhang, Lihua Liang, Yong Liu, and S. Irving. “Anand Parameter Test for Pb-Free Material SnAgCu and Life Prediction for a CSP.” In 8th International Conference on Electronic Packaging Technology, 2007. ICEPT 2007, 1–9, 2007. doi:10.1109/ICEPT.2007.4441437.
Wang, Shinan, Lihua Liang, Yong Liu, S. Irving, and Timwah Luk. “Solder Joint Reliability under Electromigration and Thermal-Mechanical Load.” In Electronic Components and Technology Conference, 2007. ECTC ’07. Proceedings. 57th, 1074–83, 2007. doi:10.1109/ECTC.2007.373931.
Wang, Shinan, Lihua Liang, Yuanxiang Zhang, Yong Liu, S. Irving, and T. Luk. “Electromigration Time to Failure Simulation for Solder Bumps of a Chip Scale Package.” In 8th International Conference on Electronic Packaging Technology, 2007. ICEPT 2007, 1–10, 2007. doi:10.1109/ICEPT.2007.4441511.
Xia, Yangjian, Yuanxiang Zhang, Lihua Liang, Yong Liu, S. Irving, and T. Luk. “Development of Moisture Automation Analysis System for Microelectronic Packaging Structures.” In International Conference on Electronic Packaging Technology High Density Packaging, 2008. ICEPT-HDP 2008, 1–7, 2008. doi:10.1109/ICEPT.2008.4606972.
Yuan, Zhongfa, Yong Liu, S. Irving, and Taikun An. “Optimization of Gel and EMC for Micro Opto Coupler to Prevent Neck Crack of Gold Wire.” In 7th International Conference on Electronic Packaging Technology, 2006. ICEPT ’06, 1–4, 2006. doi:10.1109/ICEPT.2006.359768.
Yuan, Zhongfa, Yong Liu, S. Irving, T. Luk, and Jiangyuan Zhang. “Thermal Numerical Simulation and Correlation for a Power Package.” In 8th International Conference on Electronic Packaging Technology, 2007. ICEPT 2007, 1–5, 2007. doi:10.1109/ICEPT.2007.4441399.
Yuan, Zhongfa, Yong Liu, S. Irving, and Timwah Luk. “Identification and Verification by Experiment and Simulation for the Possibility of Die Cracking Induces by UIL Test.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008, 1–5, 2008. doi:10.1109/ESIME.2008.4525065.
Yuan, Zhongfa, Yong Liu, T. Luk, and S. Irving. “Influence of Heat Sink Mounting Procedure on Package Reliability.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008, 1–5, 2008. doi:10.1109/ESIME.2008.4525067.
Zhang, Yuan Xiang, Lihua Liang, Yangjian Xia, Yong Liu, S. Irving, and T. Luk. “Highly Efficient Modeling Automation for Electronic Package Thermal Analysis.” In Electronic Components and Technology Conference, 2007. ECTC ’07. Proceedings. 57th, 1931–35, 2007. doi:10.1109/ECTC.2007.374064.
Zhang, Yuanxiang, Lihua Liang, Xuefan Chen, Yong Liu, T. Luk, and S. Irving. “Impact of the UBM Geometry and Solder Bump Shape on Electromigration Reliability in a Package System.” In 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, 2009. EuroSimE 2009, 1–6, 2009. doi:10.1109/ESIME.2009.4938432.
Zhang, Yuanxiang, Lihua Liang, Yangjian Xia, Yong Liu, S. Irving, and T. Luk. “Modeling Automation System for Electronic Package Thermal Analysis Using Excel Spreadsheet.” In 8th International Conference on Electronic Packaging Technology, 2007. ICEPT 2007, 1–5, 2007. doi:10.1109/ICEPT.2007.4441398.
Zhang, Yuanxiang, Lihua Liang, Yangjian Xia, Yong Liu, S. Irving, and Timwah Luk. “Thermal Analysis Automation System for Semiconductor Package.” In International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008, 1–7, 2008. doi:10.1109/ESIME.2008.4525028.
Zhang, Zhen, Zhigang Suo, Yong Liu, S. Irving, T. Luk, and D. Desbiens. “Methodology for Avoidance of Ratcheting-Induced Stable Cracking (RISC) in Microelectronic Devices.” In Electronic Components and Technology Conference, 2006. Proceedings. 56th, 7 pp. – . IEEE, 2006. doi:10.1109/ECTC.2006.1645844.

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